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- Path: white.lambton.on.ca!not-for-mail
- From: 84003768@white.lambton.on.ca (J LEVI)
- Newsgroups: comp.sys.amiga,comp.sys.amiga.hardware,comp.sys.amiga.programmer,no.amiga
- Subject: Re: FWD: Fate of 68080
- Followup-To: comp.sys.amiga,comp.sys.amiga.hardware,comp.sys.amiga.programmer,no.amiga
- Date: 23 Jan 1996 15:20:41 -0500
- Organization: Lambton College, Sarnia, CANADA
- Message-ID: <4e3fup$4op@white.lambton.on.ca>
- References: <4d3c27$n6c@rs18.hrz.th-darmstadt.de> <1141.6593T1100T790@norconnect.no>
- NNTP-Posting-Host: white.lambton.on.ca
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-
- Kenneth C. Nilsen (kenneth@norconnect.no) wrote:
- : >> I heard some rumours about a 700MHz PowerPC. This has very little backing,
- : >> but is it true or not? I know there have been difficulties to get more than
- : >> 300MHz so this sounds not too probable. Anyone?
-
- : >The current/near future top-of-the-line is the PPC 604@150 MHz.
- : >The 300 MHz was foreseen for the 64-bit PPC 620, but the situation about this
- : >beast is unclear since the projected performance gain is not enough these
- : >days. Instead a design rework will be done, maybe they call it 630 or so.
- : >Anyway the race for MHz sounds silly to me, since the memory can't keep pace
- : >with it, except for large (and expensive) caches. 700 MHz is science fiction
- : >I'd say.
-
- : Yeah, you got a point. But wouldn't it be possible to write data parallell to
- : memory, I mean, using double memory bus writes so that in principle you can
- : write not 1 byte, but 2 bytes simultainously or even 4 bytes etc. (hope you
- : get the picture) ?
-
- Any 32 bit processor already writes 4 bytes to memory if the RAM is 32
- bits wide. A 64 bit processor would be able to read/write 8 bytes in one
- operation. Thats why its a 64 bit processor (1 byte = 8 bits, 8 bytes =
- 64 bits.) The real problem with memory access bottle necks is that the
- processor can accept data from the memory much faster than the memory can
- give it out so the processor sits there waiting for the memory. For
- processors as fast as is being suggested here, the entire memory system
- would have to be built out of 20ns or better memory. This, while possible,
- would be very expensive. Thats like instead of having 16 megs of ram and
- a 256k cache having 16 megs of cache. Mucho denaro!
-